Advanced Verification Techniques
The dramatically increasing complexity of integrated circuits requires a continuous improvement of the verification methods. In this way, errors, which occur during the interplay of the individual circuit blocks, can already be detected in advance and thus eliminated before tapeout. Thereby, the success rate for tapeouts can be increased significantly.
In the project ANCONA - Analog Coverage in Nanoelectronics, methods for the verification of digital circuits are to be transferred to analogue circuits. For this purpose, efficient simulation methods for analog circuits and subsequent suitable coverage metrics are to be found. Finally, the methods and metrics found in State of the Art Tools should be made available.
Beneath others, at IAS is investigating in
- the representation in the equivalent baseband
- True event driven filters
- and the influence of power supply noise
as tools for the efficient verification of complex SoC.