A digital PLL for satellite based navigation in 90nm CMOS

Neyer, Andreas August (Author); Thiel, Björn Thorsten (Author); Bormann, Dirk (Author); Kählert, Stefan (Author); Erkens, Holger (Author); Wunderlich, Ralf (Author); Heinen, Stefan (Author)

Aachen / Publikationsserver der RWTH Aachen University (2009) [Conference Presentation]

11. Workshop Analogschaltungen ; 26. - 27. März 2009, Leibniz Universität Hannover


New wireless communication devices comprehend more and more functionality. The number of existing and supported communication and RF standards is increasing. On the other hand the integration of analog and mixed-signal RF circuitry becomes more complex, as advanced deepsubmicrometer CMOS processes usually do not offer any analog extension. On the circuit level more digital intensive approaches become possible and are implemented instead of classical pure analog or mixed-signal topologies. In this work a digital PLL [1] in a 90 nm CMOS technology for a multimode shared RF low-power receiver for satellite based navigation [2] is presented. The receiver covers the open service frequency bands E1, E2, L1 and G1 of the three satellite navigation systems GPS, Galileo and Glonass. One of the main advantages of the architecture is that all local oscillator frequencies nd system clocks are derived from a single PLL.


  • URN: urn:nbn:de:hbz:82-opus-30749